1. general description the 74hc273-q100; 74hct273-q100 is an octa l positive-edge triggered d-type flip-flop. the device features clock (cp) and master reset (mr ) inputs. the outputs qn assume the state of their corresponding dn inputs that meet the set-up and hold time requirements on the low-to-high clock (cp) transition. a low on mr forces the outputs low independently of clock and data inputs. inputs include clamp diodes which enable the use of current limiting resistor s to interface inputs to voltages in excess of v cc . this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? input levels: ? for 74hc273-q100: cmos level ? for 74hct273-q100: ttl level ? common clock and master reset ? eight positive edge-triggered d-type flip-flops ? complies with jedec standard no. 7a ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v. ? multiple package options 3. ordering information 74hc273-q100; 74hct273-q100 octal d-type flip-flop with reset; positive-edge trigger rev. 1 ? 19 june 2013 product data sheet table 1. ordering information type number package temperature range name description version 74hc273d-q100 ? 40 ? c to +125 ? c so20 plastic small outline package; 20 leads; body width 7.5 mm sot163-1 74hct273d-q100 74HC273PW-Q100 ? 40 ? c to +125 ? c tssop20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 74hct273pw-q100 74hc273bq-q100 ? 40 ? c to +125 ? c dhvqfn20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 ? 4.5 ? 0.85 mm sot764-1 74hct273bq-q100
74hc_hct273_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 19 june 2013 2 of 19 nxp semiconductors 74hc273-q100; 74hct273-q100 octal d-type flip-flop with reset; positive-edge trigger 4. functional diagram fig 1. functional diagram fig 2. logic symbol fig 3. iec logic symbol 001aae055 d0 d1 d2 d3 d4 d5 d6 d7 3 4 7 8 13 14 17 18 1 11 q0 q1 q2 q3 q4 q5 q6 q7 2 5 6 9 12 15 16 19 ff1 to ff8 mr cp mna763 d0 d1 d2 d3 d4 d5 d6 d7 mr cp q0 q1 q2 q3 q4 q5 q6 q7 11 1 19 16 15 12 9 6 5 2 18 17 14 13 8 7 4 3 mna764 19 16 15 12 9 6 5 11 c1 1 r 1d 2 18 17 14 13 8 7 4 3 d7 d0 d1 d2 d3 d4 d5 d6 q7 q6 q5 q4 q3 q2 q0 q1 cp mr
74hc_hct273_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 19 june 2013 3 of 19 nxp semiconductors 74hc273-q100; 74hct273-q100 octal d-type flip-flop with reset; positive-edge trigger fig 4. logic diagram 001aae056 d r d q ff8 q7 d7 d r d q ff7 q6 d6 d r d q ff6 q5 d5 d r d q ff5 q4 d4 d r d q ff4 q3 d3 d r d q ff3 q2 d2 d r d q ff2 q1 d1 d cp cp cp cp cp cp cp cp r d q ff1 q0 d0 cp mr
74hc_hct273_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 19 june 2013 4 of 19 nxp semiconductors 74hc273-q100; 74hct273-q100 octal d-type flip-flop with reset; positive-edge trigger 5. pinning information 5.1 pinning 5.2 pin description (1) this is not a supply pin. the substrate is attached to this pad using conductive die atta ch material. there is no electrical or mechanical requi rement to solder this pad. however, if it is soldered, the solder land should remain floating or be connected to gnd. fig 5. pin configuration so20 and tssop20 fig 6. pin configuration dhvqfn20 + & |